advanced power n-channel enhancement mode electronics corp. power mosfet low on-resistance bv dss 500v simple drive requirement r ds(on) 0.27 ? fast switching characteristic i d 20a description absolute maximum ratings symbol units v ds v v gs v i d @t c =25 a i d @t c =100 a i dm a p d @t c =25 w e as single pulse avalanche energy 2 mj i ar avalanche current a t stg t j symbol value units rthj-c maximum thermal resistance, junction-case 0.833 /w rthj-a maximum thermal resistance, junction-ambient 40 /w data and specifications subject to change without notice operating junction temperature range -55 to 150 201104123 thermal data parameter 1 storage temperature range continuous drain current, v gs @ 10v 10 pulsed drain current 1 80 total power dissipation 150 -55 to 150 gate-source voltage 30 continuous drain current, v gs @ 10v 20 parameter rating drain-source voltage 500 AP18N50W rohs-compliant product 200 20 g d s a dvanced power mosfets from apec provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. g d s to-3p
electrical characteristics@t j =25 o c(unless otherwise specified) symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =1ma 500 - - v r ds(on) static drain-source on-resistance 3 v gs =10v, i d =10a - - 0.27 ? v gs(th) gate threshold voltage v ds =v gs , i d =250ua 2 - 4 v g fs forward transconductance v ds =10v, i d =10a - 10 - s i dss drain-source leakage current v ds =400v, v gs =0v - - 100 ua i gss gate-source leakage v gs =+ 30v, v ds =0v - - + 100 na q g total gate charge 3 i d =20a - 94 150 nc q gs gate-source charge v ds =400v - 23 - nc q gd gate-drain ("miller") charge v gs =10v - 36 - nc t d(on) turn-on delay time 3 v dd =200v - 113 - ns t r rise time i d =10a - 80 - ns t d(off) turn-off delay time r g =50 ? ,v gs =10v - 525 - ns t f fall time r d =20 ? - 100 - ns c iss input capacitance v gs =0v - 4600 7400 pf c oss output capacitance v ds =25v - 350 - pf c rss reverse transfer capacitance f=1.0mhz - 10 - pf source-drain diode symbol parameter test conditions min. typ. max. units v sd forward on voltage 3 i s =20a, v gs =0v - - 1.3 v t rr reverse recovery time 3 i s =20a, v gs =0v - 490 - ns q rr reverse recovery charge di/dt=100a/s - 10 - uc notes: 1.pulse width limited by max junction temperature. 2.starting t j =25 o c , v dd =50v , l=1mh , r g =25 ? 3.pulse test this product is sensitive to electrostatic discharge, please handle with caution. use of this product as a critical component in life support or other similar systems is not authorized. apec does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. apec reserves the right to make changes without further notice to any products herein to improve reliability, function or design. 2 AP18N50W
fig 1. typical output characteristics fig 2. typical output characteristics fig 3. normalized bv dss v.s. junction fig 4. normalized on-resistance temperature v.s. junction temperature fig 5. forward characteristic of fig 6. gate threshold voltage v.s. reverse diode junction temperature 3 AP18N50W 0 10 20 30 40 0.0 4.0 8.0 12.0 16.0 20.0 24.0 28.0 v ds , drain-to-source voltage (v) i d , drain current (a) t c =150 o c 10v 8.0 v 6.0v v g = 5.0v 0 10 20 30 40 50 0.0 4.0 8.0 12.0 16.0 20.0 v ds , drain-to-source voltage (v) i d , drain current (a) t c =25 o c 10 v 8.0 v 6.0v v g = 5.0 v 0.4 0.8 1.2 1.6 2.0 2.4 2.8 -50 0 50 100 150 t j , junction temperature ( o c) normalized r ds(on) i d =10a v g =10v 0 4 8 12 16 20 0 0.2 0.4 0.6 0.8 1 1.2 v sd , source-to-drain voltage (v) i s (a) t j =25 o c t j =150 o c 0.5 0.7 0.9 1.1 1.3 1.5 -50 0 50 100 150 t j , junction temperature ( o c ) normalized v gs(th) (v) 0.8 0.9 1 1.1 1.2 -50 0 50 100 150 t j , junction temperature ( o c) normalized bv dss (v)
fig 7. gate charge characteristics fig 8. typical capacitance characteristics fig 9. maximum safe operating area fig 10. effective transient thermal impedance fig 11. switching time waveform fig 12. gate charge waveform 4 AP18N50W 0 0 1 10 100 0.1 1 10 100 1000 v ds ,drain-to-source voltage (v) i d (a) t c =25 o c s in g le puls e 1ms 10ms 100ms dc 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 t , pulse width (s) normalized thermal response (r thjc ) p dm duty factor = t/t peak t j = p dm x r thjc + t c t t 0.02 0.01 0.05 0.1 0.2 duty factor = 0.5 single pulse 0 2 4 6 8 10 12 0 20 40 60 80 100 120 q g , total gate charge (nc) v gs , gate to source voltage (v) i d =20a v ds =400v 1 10 100 1000 10000 1 5 9 1317212529 v ds ,drain-to-source voltage (v) c (pf) f=1.0mhz c iss c oss c rss q v g 10v q gs q gd q g charge t d(on) t r t d(off) t f v ds v gs 10% 90%
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